ComponentsTree.com

Email – care@componentstree.com | Call +918660385810
Get 50rs Discount in Your First Order (Coupon code) – NEW50

Home

74HC160 Presettable synchronous BCD decade counter IC (74160) DIP-16 Package

38.00 Excluding tax

Category: Tag:
Spread the components

74HC160 is high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC160 are synchronous presettable decade counters which feature an internal look-ahead carry and can be used for high-speed counting.

Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock (providing that the set-up and hold time requirements for PE are met).

Preset takes place regardless of the levels at count enable inputs (CEP and CET). A LOW level at the master reset input (MR) sets all four outputs of the flip-flops (Q0 to Q3) to LOW level regardless of the levels at CP, PE, CET and CEP inputs (thus providing an asynchronous clear function). The look-ahead carry simplifies serial cascading of the counters. Both count enable inputs (CEP and CET) must be HIGH to count. The CET input is fed forward to enable the terminal count output (TC). The TC output thus enabled will produce a HIGH output pulse of a duration approximately equal to a HIGH level output of Q0. This pulse can be used to enable the next cascaded stage.

Features:-

  • Synchronous counting and loading
  • Two count enable inputs for n-bit cascading
  • Positive-edge triggered clock
  • Asynchronous reset
  • Output capability: standard
  • ICC category: MSI

Specifications:-

Parameter Condition Typical Unit
HC HCT
Propagation delay (tPHL) CL = 15 pF;
VCC = 5 V
CP to Qn 19 21 ns
CP to TC 21 24 ns
MR to Qn 21 23 ns
MR to TC 21 26 ns
CET to TC 14 14 ns
propagation delay (tPLH)
CP to Qn 19 21 ns
CP to TC 21 20 ns
CET to TC 14 7 ns
maximum clock frequency (fmax) 61 31 MHz
input capacitance (C1) 3.5 3.5 pF
power dissipation capacitance per package (CPD) 3.9 34 pF

74hc160-ic-datasheet

* product image for illustration purposes only. actual product may vary.

Reviews

There are no reviews yet.

Only logged in customers who have purchased this product may leave a review.

You may also like…

Home
Account
Cart
Search