The 74LS74 device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly related to the transition time of the rising edge of the clock. The data on the D input may be changed while the clock is LOW or HIGH without affecting the outputs as long as the data setup and hold times are not violated. A low logic level on the preset or clear inputs will set or reset the outputs regardless of the logic levels of the other inputs.
• Two Independent Negative Edge Triggered JK Flip-Flops
• Standard Pin Arrangement
• Fast Switching Times
• Operating Temperature up to 70°C
• Standard TTL Switching Voltages
|Supply Voltage (VCC)||7 V|
|Input Voltage (VI)||7 V|
|Operating free-air temperature range||0°C to +70°C|
|Storage temperature range||–65°C to +150°C|
* product image for illustration purposes only. actual product may vary.