CD4001 NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
The CD4001 types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix).
- Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- 100% tested for maximum quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package temperature range):
1 V at VDD = 5 V
2 V at VDD = 10 V
2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ’B’ Series CMOS Devices”
|Inputs per channel||2|
|Input type||Standard CMOS|
|Features||Standard Speed (tpd > 50ns)|
|Operating temperature range (C)||-55 to 125|
|Package size: mm2:W x L (PKG)||14PDIP: 181 mm2: 9.4 x 19.3 (PDIP|14)|
* product image for illustration purposes only. actual product may vary.