74LS193 Binary Up/Down Counter with Clear IC (74193) DIP 16 Package
The 74LS193 is a 4-bit synchronous binary up/down counter IC from the 74LS TTL logic family.
It is designed to count upward or downward depending on the logic level applied to the UP or DOWN control inputs.
The device features:
- Separate Count Up (CPU) and Count Down (CPD) clock inputs
- Parallel load (PL) for presetting any binary value
- Asynchronous clear (CLR) to reset all outputs to zero
- Terminal count outputs (TCU and TCD) for cascading multiple counters
All operations are synchronous, meaning outputs change simultaneously on the triggering clock edge, ensuring predictable and glitch-free counting.
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Features:-
- Low Power 95 mW Typical Dissipation
- High Speed 40 MHz Typical Count Frequency
- Synchronous Counting
- Asynchronous Master Reset and Parallel Load
- Individual Preset Inputs
- Cascading Circuitry Internally Provided
- Input Clamp Diodes Limit High Speed Termination Effects
Specifications:-
| Symbol | Parameter | Min | Typ | Max | Unit | |
| VCC | Supply Voltage | 54 | 4.5 | 5 | 5.5 | V |
| 74 | 4.75 | 5 | 5.25 | |||
| TA | Operating Ambient Temperature Range | 54 | -55 | 25 | 125 | °C |
| 74 | 0 | 25 | 70 | |||
| IOH | Output Current — High | 54,74 | -0.4 | mA | ||
| IOL | Output Current — Low | 54 | 4 | mA | ||
| 74 | 8 |
Applications
- Digital event counting systems
- Frequency division circuits
- Up/down digital counters
- Position encoders and decoders
- Digital clocks and timers
- Microprocessor-based counting systems
- Binary sequence generation
- Cascaded multi-bit counting modules
* Product image for illustration purposes only, actual product may vary.





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