74LS76 Dual JK Flip Flop with Set and Clear IC Hitachi (7476) DIP 16 Package
The 74LS76 is a Dual JK Flip-Flop with Set (Preset) and Clear inputs, designed using Low Power Schottky TTL technology for high speed and low power consumption.
Each flip-flop features:
- Independent J, K, Clock (CLK), Preset (PRE?), and Clear (CLR?) inputs.
- Complementary outputs (Q and Q?).
- Edge-triggered operation — outputs change on the negative edge (falling edge) of the clock signal.
- Asynchronous Preset and Clear, which override the clock and J/K inputs when activated.
This IC is widely used in frequency dividers, toggle flip-flops, binary counters, data storage, and control logic circuits.
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Features:-
- • Two Individual Flip-Flops with J,K Clock, Set and Clear Inputs
- • Input Data is Transferred to the Outputs on HIGH-LOW Clock Transition
- • Fast Switching Speed
- • Operating Temperature up to 70°C
- • Standard TTL Switching Voltages
Specifications:-
| Symbol | Parameter | Min | Type | Max | Unit |
| VCC | Supply Voltage | 4.75 | 5 | 5.25 | V |
| TA | Operation free-air temperature | 0 | 25 | 70 | °C |
| IOH | Output Current — High | -0.4 | mA | ||
| IOL | Output Current — Low | 8 | mA |
Functional Description
Each JK flip-flop in the 74LS76 acts as a universal bistable device capable of storing 1 bit of information.
The Preset (PRE?) and Clear (CLR?) inputs are asynchronous and can override clock and data inputs to immediately set or reset the flip-flop.
The outputs Q and Q? always remain complementary. When both J and K are HIGH, the flip-flop toggles its output on each falling edge of the clock signal — making it suitable for frequency division.
Applications
- Toggle Flip-Flop / T-Flip-Flop
- Frequency Divider (Divide-by-2 circuit)
- Binary Counters and Registers
- Pulse and Signal Synchronization
- Data Storage / Memory Latches
- Sequential Logic Circuits
- Digital Control Systems
* Product image for illustration purposes only, actual product may vary.





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